About
I am a Research Scientist at Meta AI and Systems Codesign. I completed my PhD at Seoul National University, where I worked with Prof. Jung Ho Ahn, and was a visiting researcher at the University of Illinois Urbana-Champaign with Prof. Nam Sung Kim from March 2023 to March 2024.
My research focuses on improving the efficiency of GPUs for Large Language Model and Latent Diffusion Model inference, including power efficiency, higher-performance kernels, and KV cache offloading and prefix caching to CPU memory, disaggregated and CXL memory, and SSD for agentic and multi-turn inference. I am also interested in maximizing sparsity in model weights and activations, as well as improving HBM architecture and the memory hierarchy of GPU systems.
Industry Projects
- AMD MI350X LLM/LDM Inference Enablement and Optimization. Led enablement and optimization of LLM and LDM inference on AMD MI350X across multiple production models on vLLM and Gen2 stacks. Optimized attention kernels, Triton fused-MoE heuristics, kernel fusion, and auto-tuning configurations. Achieved 2x throughput over H100/MI300X at iso-latency for LLM, 2.14x on Flux diffusion, 3.5 to 4.3x on AVG lite, and 1.2x faster than B200 on Unigen-1.5-MoE.
- AI-Assisted Iterative Kernel Optimization for MI350X. Developed an automated kernel optimization loop combining AI-guided search with hardware-specific tuning for LLM inference. Wrote CK tile RMSNorm achieving 94% peak memory bandwidth, FP8 fused MoE with 17% speedup via XCD tile remap, and offline-tuned AITER MoE kernels that were 15% faster at large batch sizes.
- Power Roofline Analysis. Co-developed a power roofline methodology for GPU inference and studied energy-efficiency tradeoffs below max TDP for datacenter compute maximization under a power cap. Characterized power-bound decode attention kernels and explained kernel auto-tuning ranking flips from power excursion. Submitted to MICRO 2026.
- Blackwell FP4 GEMM Root-Cause Analysis. Investigated GB300 versus GB200 FP4 GEMM regression and traced it to TMA load latency exposure: tensor core throughput scaled 1.5x while shared memory capacity and TMA latency remained unchanged, with long_scoreboard at 79 to 89%.
- Delta Compression for GEMM Decomposition. Explored delta compression as lossless sparsification to reduce GEMM power. Best-case results yielded about 22% exact zeros, below the 75 to 90% threshold needed, while temporal delta on diffusion cross-attention K/V reached 97% zeros but spatial delta on weights reduced sparsity.
- GPU Benchmarking Infrastructure. Built a unified GPU benchmarking repository with automated sweep support, power and clock telemetry, a time-series dashboard, and auto-tuning integration.
Experience
- Research Scientist, Meta, AI and Systems Codesign, June 2025 to present
- Visiting Researcher, University of Illinois Urbana-Champaign, Prof. Nam Sung Kim, March 2023 to March 2024
- Republic of Korea Army, Mandatory military service, Korea Military Academy, November 2014 to August 2016
Education
- PhD, Seoul National University, Prof. Jung Ho Ahn, August 2019 to 2025
- B.S.E. in Electrical and Computer Engineering, Seoul National University, August 2019
Publications
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HPCA 2026 "RoMe: Row Granularity Access Memory System for Large Language Models".
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HPCA 2026 "ReScue: Reliable and Secure CXL Memory".
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CAL 2025 "Per-Row Activation Counting on Real Hardware: Demystifying Performance Overheads". Selected for HPCA 2026 Best of CAL.
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S&P 2026 "SoK: Systematizing a Decade of Architectural RowHammer Defenses Through the Lens of Streaming Algorithms".
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CAL 2025 "X-PPR: Post package repair for CXL memory".
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ASPLOS 2025 "Marionette: A RowHammer Attack via Row Coupling".
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ASPLOS 2025 "M5: Mastering page migration and memory management for CXL-based tiered memory systems".
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IEEE ESL 2024 "Hechi: A Hybrid Approach for Efficient Memory Reclamation Techniques in Mobile Systems".
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ISCA 2024 "DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands".
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ASPLOS 2024 "AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference".
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ASPLOS 2024 "TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks".
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MICRO 2023 "How to Kill the Second Bird with One ECC: The Pursuit of Rowhammer Resilient DRAM".
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CAL 2023 "X-ray: Discovering DRAM internal structure and error characteristics by issuing memory commands".
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HPCA 2023 "SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling".
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arXiv "AESPA: Accuracy Preserving Low-degree Polynomial Activation for Fast Private Inference".
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IEEE TC 2022 "Future Scaling of Memory Hierarchy for Tensor Cores and Eliminating Redundant Shared Memory Traffic Using Inter-Warp Multicasting".
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ISCA 2022 "BTS: An Accelerator for Bootstrappable Fully Homomorphic Encryption".
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HPCA 2022 "Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh".
Service
- MICRO regular PC member, 2026
- IEEE Transactions on Computers reviewer, 2024
- IEEE Computer Architecture Letters reviewer, 2025 to 2026